module Timer8Bit(SEG1,SEG0,LED,CLK,RESET,SW,MODE);
input CLK,RESET,MODE;
input [7:0]SW;
output [6:0]SEG1,SEG0;
output [7:0]LED;
reg [6:0]SEG1,SEG0;
reg [6:0]display[15:0];
reg [25:0]clk_counter;
reg [7:0]Sec;
reg [7:0]LED;
initial
begin
Sec = 0;
clk_counter = 0;
display[0] = 7'b1000000;
display[1] = 7'b1111001;
display[2] = 7'b0100100;
display[3] = 7'b0110000;
display[4] = 7'b0011001;
display[5] = 7'b0010010;
display[6] = 7'b0000010;
display[7] = 7'b1111000;
display[8] = 7'b0000000;
display[9] = 7'b0010000;
display[10] = 7'b0001000;
display[11] = 7'b0000011;
display[12] = 7'b1000110;
display[13] = 7'b0100001;
display[14] = 7'b0000110;
display[15] = 7'b0001110;
end
always@(posedge CLK)
begin
if(clk_counter == 50_000_000)
begin
Sec = Sec + 1;
clk_counter = 0;
end
else
clk_counter = clk_counter + 1;
if(RESET == 0)
begin
Sec = 0;
end
LED = Sec[7:0];
if(MODE == 1)
begin
SEG1 = display[SW[7:4]];
SEG0 = display[SW[3:0]];
end
else
begin
SEG1 = display[Sec[7:4]];
SEG0 = display[Sec[3:0]];
end
end
endmodule